Verification and Validation
TITLE: Verification and Validation
AUTHOR: gepr
FORMAT: raw
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There has been alot of use and abuse of the terms
"validation" and "verification" in the world of
simulation. There are lots of ways these words can be
used. But, I'd like to clarify some of the uses with a little
text. The terms may seem incompatible with Logical
Validity and Logical Soundness; but, they really aren't. Logical
validity is the internal consistency of a set of statements, wherein
the conclusion follows from the assumptions. Logical soundness is
when a conclusion (or any one of the statements in a proof) is
externally confirmed as true. Logical validity is comensurate
with validation in simulation because the realization is clear that
when using simulation, there exists no simple way to establish
soundness. Instead, validation is extended to check the
consistency of the data used to drive the simulation. All of this
presupposes the acceptance of a measurement process.
The Air Force:
AIR FORCE INSTRUCTION 16-1001
1 JUNE 1996
Operations Support
VERIFICATION, VALIDATION AND ACCREDITATION (VV&A)
Taken from (now defunkt):http://204.34.204.77/kb/
- Verification: Verification is the process of determining
that M&S accurately represent the developer's conceptual
description and specifications. This is accomplished by identifying
and eliminating mistakes in logic, mathematics, or programming. This
process establishes that the M&S code and logic correctly
perform the intended functions, and to what extent M&S
development activities conform to state-of-the-practice software
engineering techniques.
- Validation: The process of determining the degree to which
a model is an accurate representation of the real-world from the
perspective of the intended uses of the model. Validation process
can be used to identify model improvements, where necessary. It has
two main components: structural validation, which includes an
internal examination of M&S assumptions, architecture, and
algorithms in the context of the intended use; and output
validation, which determines how well the M&S results compare
with the perceived "real world."
My Opinion:
- Verification is "model matching" or
... establishing that two models are isomorphic or that the differences
between models are stated completely (e.g. variant assumptions or impact
of implementation on requirements flowdown).
- Validation: two types
- Structural -- Structural validation is to ensure that the
model assumptions lead to the conclusions of the model.
- Output -- Output validation is to ensure that the measurements
on the model is equivalent to the same measurements on the system
being modelled. The output of the model is simply the result
of measurements taken on the model. Data is the result of
measurements taken on the system. "Equivalence",
here, means either "consistent with" or "consistent
up to the point defined by well-defined and expected
differences" (e.g. commensuration with simplifying
assumptions).
glen e. p. ropella